tutorial outline

this tutorial deals with:

• FPGA structure and organization
• typical design and test workflow with FPGA
• automated synthesis of circuits on FPGA
• lab experience

FPGA structure

precursors: PLA, PAL, CPLD

typical FPGA constituents:

• logical elements (LE): specializable for user-defined logical functions
• complex logical blocks (CLB): built from LEs, multiplexers, registers etc., configurable to implement user-defined circuit components
• interconnection, routing, and I/O blocks

design workflow with FPGA

typical work sequence (not all steps are present in every design):

1. RTL specification (schematic or HDL design)
2. syntactic and static semantic analysis
   • correction of any errors, analysis reiteration
3. RTL simulation
   • correction of any semantic errors, reiteration of analysis and simulation
4. RTL synthesis
5. timing analysis and clock adjustment
6. physical synthesis

automated synthesis on FPGA

physical synthesis, which is automated by several analysis and optimization tools, is composed of various processes:

• mapping of RTL components to FPGA components (LE, CLB etc.)
• placement of components and signal routing over the FPGA
  • using suitable optimization algorithms: recursive cut, simulated annealing
• FPGA netlist generation