Clock fine tuning tips using Quartus Quartus TimeQuest Analysis

  After successful compilation of a Quartus project for a synchronous 
circuit or system, if no errors are reported (check Messages under 
Analysis & Synthesis in the central pane Table of Contents), one should 
adjust the clock frequency in order to get a positive worst-case slack. 
This fine tuning may be easily performed by means of the Quartus tool 
TimeQuest Timing Analyzer. Here are the actions to this purpose: 

 1. under TimeQuest Timing Analyzer in the Table of Contents, click 
    Clocks, then right-click CLK in the right pane and finally select 
    Report Timing... (in TimeQuest UI);

 2. in the Report Timing window which pops up, select CLK for the 
    From clock top entry, then press the Report Timing bottom button; 

 3. the worst case slack is reported in the bottom Console pane; it's OK 
    if this is positive, otherwise (a negative slack is reported in red) 
    one should increase the current clock period (default is 1 ns) at 
    least by the absolute value of the reported worst-case slack, as 
    follows: 

 4. in the Tools top menu, click TimeQuest Timing Analyzer Wizard...;

 5. fill the base clock settings entries in the Clock tab of the wizard 
    with:
     o  Clock Name: overwrite the <<New>> entry with CLK
     o  Input PIN: double-click the entry and select the appropriate 
        PIN name (usually CLK)
     o  Period: type a value greater than sum of current clock period + 
        abs. value of worst-case slack
     o  Rising: half of Period
     o  Falling: equal to Period

 6.  in the Summary tab of the wizard click Finish; press Yes in the 
     subsequent pop-up, to overwrite the SDC output file;

 7.  Save Project in the File top menu, recompile and check again the 
     worst-case slack by repeating actions from 1 above.

--

   Author: Giuseppe Scollo, University of Catania, DMI
   Date: 14 October 2016